This message announces the availability of SIMSYNCH release synch1b4.

New in synch1b4:

	* scm2vrlg.scm (translate-assignment): Restored self-sets, except
	for arrays.
	* simsynch.scm (synch:print): Fixed initial off-by-one.
	* scm2vrlg.scm (translate-tag): Translate reset expressions.
	* scm2vrlg.scm (translate-exp): 0 -> 2'b00.
	(generate-standard-includes):
	(generate-module-includes): include from current directory.
	* scm2vrlg.scm (out-int): Minimum number length is 2 bits.
	* simsynch.scm: Display version in opening message.
	* scm2vrlg.scm (translate-tag): fluid-let *block* needs to apply
	to all translations.
	* scm2vrlg.scm (generate-module-header): Assure that clock is an
	input to module.
	* simsynch.scm (define-synchronous-system): Fixed resets.
	* logic.scm (array-bounds): Now takes block as an argument,
	instead of using *block*.
	* scm2vrlg.scm (translate-constant-definition): Negative constants
	=> 1'bx.
	* logic.scm (vector-bounds): Fixed for imported signals; for
	example (xp tl-y[6:0]).
	* Makefile (synch.info): Tolerate infobar no-changes error.

				-=-=-

SIMSYNCH is a simulator for digital electronics at scales from chip to
board.

 The design files are comprised of Scheme definitions and expressions.
 These design files can be run as a Scheme program at high speed.  The
 design files can also be translated into formats suitable for logic
 compilers (MACHXL and Verilog).

 SIMSYNCH simulates blocks of synchronous logic, signals whose states
 change simultaneously on a clock signal transition.  Each block also
 has a reset signal, which forces all signals to the state specified
 in the design file.  SIMSYNCH can simultaneously simulate multiple
 blocks with different clocks and resets.  Devices can contain
 multiple blocks; Blocks can span multiple devices.

Documentation is included in the distribution.  Documentation is also
online at:

	   http://swissnet.ai.mit.edu/~jaffer/SIMSYNCH.html

SIMSYNCH source is available from:
 http://swissnet.ai.mit.edu/ftpdir/scm/synch1b4.zip
 ftp.gnu.org:pub/gnu/jacal/synch1b4.zip (FTP instructions follow)

SCM is the Scheme implementation under which SIMSYNCH runs.
 http://swissnet.ai.mit.edu/ftpdir/scm/scm5d0.zip
 ftp.gnu.org:pub/gnu/jacal/scm5d0.zip

SLIB is a Scheme library which SCM and SIMSYNCH use:
 http://swissnet.ai.mit.edu/ftpdir/scm/slib2c5.zip
 ftp.gnu.org:pub/gnu/jacal/slib2c5.zip

Programs for printing and viewing TexInfo documentation (which
SIMSYNCH has) come with GNU Emacs or can be obtained via ftp from:
 ftp.gnu.org:pub/gnu/texinfo/texinfo-4.0.tar.gz

				-=-=-

  ftp ftp.gnu.org (anonymous)
  bin
  cd pub/gnu/jacal
  get synch1b4.zip
  get slib2c5.zip
  get scm5d0.zip

Remember to use binary mode when transferring the files.
Be sure to get and read the GNU General Public License (COPYING).
It is included in synch1b4.zip.
