# SP Get Port 80 Subcommand

access: All users

Retrieves the last Port 80 post code from the PRS Port80 register. The register is written by platform BIOS during platform boot. This command is used to debug platform boot problems.

> sp get port80 {-m | --monitor}

Argument | Description
--- | ---
{-m | --monitor} | Allows for continuous monitoring of the port 80 traffic.

You can also retrieve the last ten Port 80 post codes using the Operator Panel. Refer to the documentation that accompanied your server for more details about using the Operator Panel menus.

BIOS Post Codes

The following table lists the POST (Power On Self Test) codes for the Phoenix BIOS.

Post Code | Description
--- | ---
02 | Verify real mode
03 | Disable non-maskable interrupt (NMI)
04 | Get CPU type
06 | Initialize system hardware
07 | Disable shadow and execute code from the ROM
08 | Initialize chipset with initial POST values
09 | Set IN POST flag
0A | Initialize CPU registers
0B | Enable CPU cache
0C | Initialize caches to initial POST values
0E | Initialize I/O component
0F | Initialize the local bus IDE
10 | Initialize power management
11 | Load alternate registers with initial POST values
12 | Restore CPU control word during warm boot
13 | Initialize PCI bus mastering devices
14 | Initialize keyboard controller
16 | BIOS ROM checksum
17 | Initialize cache before memory autosize
18 | 8254 programmable interrupt timer initialization
1A | 8237 DMA controller initialization
1C | Reset programmable interrupt controller
20 | Test DRAM refresh
22 | Test 8742 keyboard controller
24 | Set ES segment register to 4GB
26 | Enable gate A20 line
28 | Autosize DRAM
29 | Initialize POST memory manager
2A | Clear 512KB base RAM
2C | RAM failure on address line xxxx
2E | RAM failure on data bits xxxx of low byte of memory bus
2F | Enable cache before system BIOS shadow
30 | RAM failure on data bits xxxx of high byte of memory bus
32 | Test CPU bus clock frequency
33 | Initialize Phoenix Dispatch Manager
36 | Warm start shut down
38 | Shadow system BIOS ROM
3A | Autosize cache
3C | Advanced configuration of chipset registers
3D | Load alternate registers with CMOS values
41 | Initialize extended memory for RomPilot
42 | Initialize interrupt vectors
45 | POST device initialization
46 | Check ROM copyright notice
47 | Initialize I20 support
48 | Check video configuration against CMOS
49 | Initialize PCI bus and devices
4A | Initialize all video adapters in system
4B | QuietBoot start (optional)
4C | Shadow video BIOS ROM
4E | Display BIOS copyright notice
4F | Initialize MultiBoot
50 | Display CPU type and speed
51 | Initialize EISA board
52 | Test keyboard
54 | Set key click if enabled
55 | Enable USB devices
58 | Test for unexpected interrupts
59 | Initialize POST display service
5A | Display prompt "Press F2 to enter SETUP"
5B | Disable CPU cache
5C | Test RAM between 512KB and 640KB
60 | Test extended memory
62 | Test extended memory address lines
64 | Jump to UserPatch1
66 | Configure advanced cache registers
67 | Initialize Multi Processor APIC
68 | Enable external and CPU caches
69 | Setup system management mode (SMM) area
6A | Display external L2 cache size
6B | Load custom defaults (optional)
6C | Display shadow area message
6E | Display possible high address for UMB recovery
70 | Display error messages
72 | Check for configuration errors
76 | Check for keyboard errors
7C | Set up hardware interrupt vectors
7D | Initialize Intelligent System Monitoring
7E | Initialize coprocessor if present
80 | Disable onboard super I/O ports and IRQ's
81 | Late POST device initialization
82 | Detect and install external RS232 ports
83 | Configure non-MCD IDE controllers
84 | Detect and install external parallel ports
85 | Initialize PC compatible PnP ISA devices
86 | Reinitialize onboard I/O ports
87 | Configure motherboard configurable devices (optional)
88 | Initialize BIOS data area
89 | Enable non-maskable interrupts (NMI's)
8A | Initialize extended BIOS data area
8B | Test and initialize PS/2 mouse
8C | Initialize floppy controller
8F | Determine number of ATA drives (optional)
90 | Initialize hard disk controllers
91 | Initialize local bus hard disk controllers
92 | Jump to UserPatch2
93 | Build MPTABLE for multi processor boards
95 | Install CD ROM for boot
96 | Clear huge ES segment register
97 | Fixup multi processor table
98 | Search for option ROM's
99 | Check for SMART drive (optional)
9A | Shadow option ROM's
9C | Set up power management
9D | Initialize security engine (optional)
9E | Enable hardware interrupts
9F | Determine number of ATA and SCSI drives
A0 | Set time of day
A2 | Check key lock
A4 | Initialize typematic rate
A8 | Erase F2 prompt
AA | Scan for F2 key stroke
AC | Enter setup
AE | Clear boot flag
B0 | Check for errors
B1 | Inform RomPilot about the end of POST
B2 | POST done - prepare to boot operating system
B4 | One short beep
B5 | Terminate QuietBoot (optional)
B6 | Check password
B7 | Initialize ACPI BIOS
B9 | Prepare boot
BA | Initialize DMI parameters
BB | Initialize PnP option ROM's
BC | Clear parity checkers
BD | Display multiboot menu
BE | Clear screen
BF | Check virus and backup reminders
C0 | Try to boot with interrupt 19
C1 | Initialize POST Error Manager (PEM)
C2 | Initialize error logging
C3 | Initialize error display function
C4 | Initialize system error handler
C5 | PnP dual CMOS (optional)
C6 | Initialize notebook docking (optional)
C7 | Initialize notebook docking late
C8 | Force check (optional)
C9 | Extended checksum (optional)
CA | Redirect Int 15h to enable remote keyboard
CB | Redirect Int 13 to Memory Technologies Devices such as ROM, RAM, PCMCIA, and serial disk
CC | Redirect Int 10h to enable remote serial video
CD | Re-map I/O and memory for PCMCIA
CE | Initialize digitizer and dispaly message
D2 | Unknown interrupt

The following are for boot block in Flash ROM:

Post Code | Description
--- | ---
E0 | Initialize the chipset
E1 | Initialize the bridge
E2 | Initialize the CPU
E3 | Initialize the system timer
E4 | Initialize system I/O
E5 | Check force recovery boot
E6 | Checksum BIOS ROM
E7 | Go to BIOS
E8 | Set Huge Segment
E9 | Initialize Multi Processor
EA | Initialize OEM special code
EB | Initialize PIC and DMA
EC | Initialize Memory type
ED | Initialize Memory size
EE | Shadow Boot Block
EF | System memory test
F0 | Initialize interrupt vectors
F1 | Initialize Run Time Clock
F2 | Initialize video
F3 | Initialize System Management Menager
F4 | Output one beep
F5 | Clear Huge Segement
F6 | Boot to mini DOS
F7 | Boot to Full DOS

Return Codes

Following are the return values for this command:

Code | Numeric Code | Description
--- | --- | ---
NWSE_Success | 0 | Command successfully completed.
NWSE_InvalidUsage | 1 | Invalid usage: bad parameter usage, conflicting options specified.
NWSE_NoPermission | 6 | Not authorized to perform this operation.
NWSE_NoMemory | 8 | Insufficient memory.
NWSE_ServiceNotAvailable | 24 | Requested service is not available. The port80 executable is not available in the system path.

Related Topics

System Management Commands

SP Command